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    Question

    In pipelining, the CPU executes each instruction in a series of following stages: Instruction Fetching (IF) —–> Instruction Decoding (ID) —–> Instruction Execution (EX) —–>__ and Register Write back (WB).

    A Linear pipelines Correct Answer Incorrect Answer
    B Non-linear pipelines Correct Answer Incorrect Answer
    C Structural hazards Correct Answer Incorrect Answer
    D Memory access (MEM) Correct Answer Incorrect Answer
    E None of these Correct Answer Incorrect Answer

    Solution

    The correct answer is D

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