New Click here to enroll in UIICL SO Finance and Investment Course

    Register

    Question

    In pipelining, the CPU executes each instruction in a series of following stages: Instruction Fetching (IF) —–> Instruction Decoding (ID) —–> Instruction Execution (EX) —–>__ and Register Write back (WB).

    A Linear pipelines Correct Answer Incorrect Answer
    B Non-linear pipelines Correct Answer Incorrect Answer
    C Structural hazards Correct Answer Incorrect Answer
    D Memory access (MEM) Correct Answer Incorrect Answer
    E None of these Correct Answer Incorrect Answer

    Solution

    The correct answer is D

    Practice Next